scc

commit 53e82078e4f9c8450ba94ba169cce9b51d513df2
parent 3bab86e457e6c4035faa26e237bc5ed7e85da472
Author: Roberto E. Vargas Caballero <roberto.vargas@igrid-td.com>
Date:   Tue, 12 Apr 2016 17:16:50 +0200

[cc2-qbe] Add Sethi-Ullman number calculation

In the case of QBE we can ignore the addressability, and we only
use it for the Sethi-Ullman number generation

Diffstat:
M
cc2/arch/qbe/cgen.c
 | 
51
+++++++++++++++++++++++++++++++++++++++++++++++++++
M
cc2/arch/z80/cgen.c
 | 
6
++----

2 files changed, 53 insertions(+), 4 deletions(-)
diff --git a/cc2/arch/qbe/cgen.c b/cc2/arch/qbe/cgen.c
@@ -7,7 +7,58 @@ generate(void)
 {
 }
 
+/*
+ * This is strongly influenced by
+ * http://plan9.bell-labs.com/sys/doc/compiler.ps (/sys/doc/compiler.ps)
+ * calculate addresability as follows
+ *     AUTO => 11          value+fp
+ *     REG => 11           reg
+ *     STATIC => 11        (value)
+ *     CONST => 11         $value
+ * These values of addressability are not used in the code generation.
+ * They are only used to calculate the Sethi-Ullman numbers. Since
+ * QBE is AMD64 targered we could do a better job here, and try to
+ * detect some of the complex addressing modes of these processors.
+ */
 Node *
 sethi(Node *np)
 {
+	Node *lp, *rp;
+
+	if (!np)
+		return np;
+
+	np->complex = 0;
+	np->address = 0;
+	lp = np->left;
+	rp = np->right;
+
+	switch (np->op) {
+	case AUTO:
+	case REG:
+	case MEM:
+	case CONST:
+		np->address = 11;
+		break;
+	default:
+		sethi(lp);
+		sethi(rp);
+		break;
+	}
+
+	if (np->address > 10)
+		return np;
+	if (lp)
+		rp->complex = lp->complex;
+	if (rp) {
+		int d = np->complex - rp->complex;
+
+		if (d == 0)
+			++np->complex;
+		else if (d < 0)
+			np->complex = rp->complex;
+	}
+	if (np->complex == 0)
+		++rp->complex;
+	return np;
 }
diff --git a/cc2/arch/z80/cgen.c b/cc2/arch/z80/cgen.c
@@ -42,10 +42,8 @@ sethi(Node *np)
 		np->address = 20;
 		break;
 	default:
-		if (lp)
-			sethi(lp);
-		if (rp)
-			sethi(rp);
+		sethi(lp);
+		sethi(rp);
 		break;
 	}