voron

experimental ARM OS
git clone git://git.2f30.org/voron
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io.h (1213B)


      1 #ifndef __IO_H
      2 #define __IO_H
      3 
      4 #include <inttypes.h>
      5 
      6 /* data memory barrier */
      7 #define dmb()	asm volatile("dmb" : : : "memory")
      8 /* data synchronization barrier */
      9 #define dsb()	asm volatile("dsb" : : : "memory")
     10 /* instruction synchronization barrier */
     11 #define isb()	asm volatile("isb" : : : "memory")
     12 
     13 /* compiler barrier */
     14 #define cb()	asm volatile("" : : : "memory");
     15 /* memory barrier */
     16 #define mb()	dsb()
     17 /* read memory barrier */
     18 #define rmb()	dsb()
     19 /* write memory barrier */
     20 #define wmb()	dsb()
     21 
     22 #define readl_relaxed(a)	(*(volatile u32*)(a))
     23 #define readw_relaxed(a)	(*(volatile u16*)(a))
     24 #define readb_relaxed(a)	(*(volatile u8*)(a))
     25 
     26 #define writel_relaxed(v, a)	(*(volatile u32*)(a) = (u32)(v))
     27 #define writew_relaxed(v, a)	(*(volatile u16*)(a) = (u16)(v))
     28 #define writeb_relaxed(v, a)	(*(volatile u8*)(a) = (u8)(v))
     29 
     30 #define readl(a)	({ u32 __r = readl_relaxed(a); rmb(); __r; })
     31 #define readw(a)	({ u16 __r = readw_relaxed(a); rmb(); __r; })
     32 #define readb(a)	({ u8  __r = readb_relaxed(a); rmb(); __r; })
     33 
     34 #define writel(v, a)	({ wmb(); writel_relaxed(v, a); })
     35 #define writew(v, a)	({ wmb(); writew_relaxed(v, a); })
     36 #define writeb(v, a)	({ wmb(); writeb_relaxed(v, a); })
     37 
     38 #endif	/* __IO_H */